Device and Bus Power Management

PCI Express (PCIe) Active State Power Management (ASPM)

We have one project in progress for the PCI Express subsystem, PCI Express (PCIe) Active State Power Management. Our goal with this project is to allow you to select PCIe ASPM dynamically, based on your changing power versus performance preference.

PCIe ASPM technology allows PCIe hardware to transition the link to lower power states. The link is the physical interface between the PCI endpoint and the PCI switch. When ASPM is enabled, we can reduce power consumption even when the devices are in a fully powered on state (D0). This technology is specified in the PCI Express Specification, which is available to PCI SIG members. A white paper about this technology can be found here.

While ASPM can be enabled by the BIOS, it is often enabled only for mobile systems because the latency to transition from lower to fully powered state can cause a drop in performance. However, depending on the administrator's power policy, the OS should be able to switch this feature on or off at will, depending on whether the administrator wants to favor power over performance or vice versa.